Doppler speed log

ABSTRACT

A doppler speed log for marine vessels transmits fore and aft pulses of high frequency sonic energy. The log normally operates in a mode such that a gating pulse permits signal processing circuits to respond only to signals derived from reflections from minute scatterers in the water occurring at a specified distance from the hull of the vessel. If the vessel is in shallow water, a variable threshold comparator permits the signal processing circuits to respond to reflections from the sea bottom when the magnitude of these reflected signals exceeds the threshold level. The processing circuit forms fore and aft enabling pulses each having a duration equal to the time required for the reception of a specified number of cycles of sonic energy reflected from the fore and aft directions, respectively. Pulses from a calibrated clock source are applied to an up-down counter during the time that only one of the enabling pulses exists. The readings corresponding to a specified number of transmitted pulses are accumulated and displayed on a suitable readout means.

United States Patent [1 1 Kritz et al.

[ DOPPLER SPEED LOG [75] Inventors: Jacob A. Kritz, Westbury; Seymour D.Lerner, Plainview, both of NY.

[73} Assignee: Spewjgnd Corporation, New

York, NY.

[22] Filed: July 6, 1971 [21] Appl. No.2 159,853

[52] U.S. Cl 340/3 D, 343/8, 343/9 [51] Int. Cl. GOls 9/66 [58] Field ofSearch 340/3 D, 3 R; 343/8, 9

[56] References Cited UNITED STATES PATENTS Primary ExaminerSamuelFeinberg Assistant ExaminerR. Kinberg Attorney, Agent, or FirmS. C.Yeaton; Howard P. Terry; Joseph M. RoehF [111 3,795,893 [451 Mar. 5,1974 [57] ABSTRACT A doppler speed log for marine vessels transmits foreand aft pulses of high frequency sonic energy. The log normally operatesin a mode such that a gating pulse permits signal processing circuits torespond only to signals derived from reflections from minute scatterersin the water occurring at a specified distance from the hull of thevessel. If the vessel is in shallow water, a variable thresholdcomparator permits the signal processing circuits to respond toreflections from the sea bottom when the magnitude of these reflectedsignals exceeds the threshold level. The processing circuit forms foreand aft enabling pulses each having a duration equal to the timerequired for the reception of a specified number of cycles of sonicenergy reflected from the fore and aft directions, respectively. Pulsesfrom a calibrated clock source are applied to an updown counter duringthe time that only one of the enabling pulses exists. The readingscorresponding to a specified number of transmitted pulses areaccumulated and displayed on a suitable readout means.

16 Claims, 5 Drawing Figures PAIENIEDMR 5:914 31951893 SHEEI 1 BF 4TRANSMIT TIME RETURN l I I GATING PULSE I I l TIME I l I l ENABLINGPULSE TIME FIG.2.

DOPPLER SPEED LOG BACKGROUND OF THE INVENTION 1. Field of the InventionThis invention relates to marine navigation systems and morespecifically to pulsed sonar doppler navigation systems.

2. Description of the Prior Art A variety of sonar doppler navigators isknown in the art. One class of these navigators, generically labelledJanus type navigators, utilizes a forward-lool ing and an aft-lookingsonic beam. Motion of the vessel causes doppler shifts in the frequencyof the sound waves reflected from the ocean bottom. This results in adifference .in frequencies of the reflected fore and aft beams andpermits a measurement of the motion and speed of the vessel.

Prior art speed logs recognize the fact that in order to obtain accuratemeasurements, the necessary information must be gathered from areas inthe water remote from the hull of the vessel. Such prior art devices useprotruding members for supporting transducers. Such protruding members,however, are easily fouled and broken.

Furthermore, prior art pulse doppler speed logs are known in which thereceived pulses are converted to c.w. signals for subsequent processing.Because of the complex nature of the return signal, however, suchdevices are somewhat inaccurate. For example, some devices utilize aphase-locked loop which locks onto the received pulses and remembers thefrequency between pulses so as to construct a c.w. signal which can bereadily instrumented. High accuracy requires that the true averagefrequency be taken over the entire pulse. However, this requirement canonly be approached in such prior art circuits because of the largebandwidth occupied by the received doppler spectrum.

SUMMARY OF THE INVENTION The speed log of the present invention utilizesflush mounted sonic transducers in a .Ianus system to measure dopplershifted signals reflected from scatterers located remotely from the hullby actuating signal processing circuits only after a predetermined delayso that energy backscattered from water reflectors close to the hull isignored. The device further includes a timevarying threshold circuitwhich permits signals reflected from the bottom to actuate the signalprocessing circuits when the vessel is in shallow water. The processingcircuits generate fore and aft enabling pulses having durations equal toa specified number of periods of the respective received signals. Thedifference in duration of pairs of enabling pulses is used as a measureof the differential doppler shift experienced by corresponding fore andaft sonic pulses.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. I is a diagram illustrating thesonic transmission scheme used in the present invention;

FIG. 2 is a diagram illustrating the timing format used in the presentinvention; and

FIGS. 3 to 5 are block diagrams useful in explaining the principles andoperation of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT The doppler speed log of thepresent invention measures water speed and distance travelled throughthe water by the vessel in which the log is installed. The deviceoperates by transmitting beams of sonic energy outwardly and downwardlyfrom the vessel and then measuring the doppler-shifted signals reflectedfrom scatterers such as small particles suspended in the water,plankton, air bubbles, sand and the like. Such discontinuities in thewater scatter the sonic energy which illuminates them in all directions.

The invention employs pairs of piezo-electric tranducers to transmitnarrow beams of sonic energy at a frequency f, in the fore and aftdirections. Referring more particularly to FIG. l,'a vessel 11 moves ina forward direction at a horizontal velocity V. In addition to theforward motion, the vessel is subjected to a vertical heaving motion V Aforward-looking beam of sonic energy 13 irradiates scatterers 15 whichreflect a portion of this sonic energy back to the forward-lookingtransducer. At the same time, an aft-looking transducer produces asecond beam of sonic energy 17 which illuminates scatterers 19. Aportion of the energy illuminating the scatterers I9 is also reflectedback to the aftlooking transducer.

The transducers are disposed so that the beams of sonic energy areformed at a particular angle with respect to the hull of the vessel.Typically, the transducers are disposed so that the beams make and angleof 60 with respect to the longitudinal axis of the vessel.

Since the vessel tends to pitch about a transverse axis in response towave motion, the beams 13 and 17 tend to oscillate with respect to thehorizon. In the diagram of FIG. 1, therefore, the angle 0 is taken withrespect to the horizontal and ismomentarily less than the angle that thebeam 13 makes with the longitudinal axis of the vessel. Similarly, 0,,is indicated as being greater than the corresponding aft angle sincethis angle is also measured with respect to the horizontal.

As the vessel moves through the water, the frequency of one of thereturn signals is increased whereas the frequency of the opposite returnsignal is decreased.

Assuming that the vessel pitches throughout an angle id), the indicatedspeed is given by the formula:

The first term of the equation corresponds to the true surface velocityV. The transmitter frequency f,, is maintained constant by use ofacrystal controlled oscillator. Changes in the propagation velocity cwith water temperature are compensated as will be described. A decreasein the proportionality constant of V is always produced when the vesselpitches through a significant pitch angle 4). The sensitivity to is,however, fairly low. For example, if the pitch is assumed to varysinusoidally with time with an amplitude of 6, the averageproportionality error is 0.25 percent.

To the extent that a correlation exists between instantaneous values ofheave velocity V and pitch angle 4), the second term of the equationproduces an average offset error. Except in heavy sea states at lowspeeds, however, this effect is negligible.

As will be described, the signal processing in the speed log utilizesthe difference between average periods of fore and aft received signals.From these data it can be shown that, for the usual marine speeds, thisdifference in average period is equivalent to measuring the differencebetween the frequencies of the fore and aft return signals.

Since the return signals arise from reflections from diffuse scatterers,the return is actually the summation of the returns from all of thevarious scatterers illuminated by the incident beam. To the extent thatthe beam has finite width, the angles 6; and 0,, vary slightly fromparticle to particle. Furthermore, the individual particles may haveslight random motions with respect to one another and with respect tothe transducer. This causes slight differences in frequency among thecomponent backscattered returns.

Summation of the individual returns yields a signal" with the samecharacteristic as narrow band noise. In the frequency domain, the returnis a narrow smear encompassing a band of frequencies rather than theideal impulse function which would represent a single frequency. Thedoppler speed log obtains an estimate ofthe frequency represented byeach return which is as accurate and steady as possible. In order toachieve the desired requirement that measurement be made relative toparticles remote from the vessel, a pulsed mode of operation isemployed. As indicated in FIG. 2, which represents a single measuringepoch in one of the fore and aft channels, the device uses transmitpulses of short duration spaced at relatively long intervals. In atypical device, transmission pulses having a duration of 1.3milliseconds are generated at 7.31 millisecond intervals.

During the time that the sonic pulse is being transmitted, the circuitsof the speed log block off the receivers. The return pulse, asillustrated in FIG. 2, consists of a complex wave shape generallyexhibiting an exponential decay.

At a predetermined time in each measuring epoch, a gating pulse isgenerated which permits the circuits to accept a definite number ofcycles of the water return pulse. In a typical speed log, the gatingpulse is generated 4 milliseconds after the beginning of the transmitpulse. This accepts energy from a region between 10 feet and 13 feetfrom the hull of the vessel.

It will be appreciated that each of the fore and aft channels utilizeindividual sonic waves and enabling pulses of the type illustrated inFIG. 2.

Fore and aft enabling pulses are used in the speed log to permitcalibrated clock pulses to pass into an updown counter so as to producethe actual speed display. The results of a number of epochs oftransmit-receive operation are averaged to generate a single speeddisplay. In a typical speed log, 384 epochs are averaged to generate asingle display.

Although not restricted to a particular frequency, the speed logoperates most efficiently at a relatively high frequency. Both thebackscattered signal intensity and attenuation increase with frequency.It has been observed that a sonic carrier frequency in the order of 2MHz yields maximum return from a water mass at a range of about 10 feet.The use of such a relatively high frequency also reduces the scatter inspeed readings since an increased number of periods may be averaged in apractical time period. The use of such a relatively high frequency alsopermits a significant reduction in the size, weight and cost of atransducer assembly.

The overall system of the speed log is depicted in accompanying FIGS. 4and 5. The operation of the speed log is coordinated by a pulserepetition frequency (PRF) oscillator 21 as shown in FIG. 4. The PRFoscillator produces several pulse trains having certain criticalrelationships as will become apparent as the discussion proceeds. Aparticular PIRF oscillator suitable for use with the speed log isdepicted in more detail in FIG. 3 in which a constant current source 23charges a capacitor 25 linearly in a negative direction. A transmitpulse comparator 27 is referenced to a suitable negative voltagetypically in the order of 4 volts. As the negative charge on thecapacitor 25 builds up to a value equal to the reference voltage, thecomparator 27 triggers a monostable multivibrator 29. The multivibrator29 has a quasi-stable period equal to the desired pulse duration of thetransmit pulse. When the multivibrator 29 is in the quasi-stable state,it provides a switching signal to the shorting switch 31 which rapidlydischarges the capacitor 25. Thus the output of the multivibratorconstitutes a transmit pulse having desired du' ration and spacing. Thevoltage on the capacitor 25 is also applied to a gating pulse comparator33. The comparator 33 is referenced to an intermediate voltage by meansof divider resistors 35 and 37. Typically, the divider resistors areselected to provide a reference voltage for the comparator 33 in theorder of 2 volts.

As the voltage on the capacitor 25 approaches the reference voltage ofthe comparator 33, this comparator produces an output signal which isdifferentiated in the R-C circuit 39 to provide a sharp gating pulse.

Thus the circuit produces a gating pulse at a predetermined time afterthe occurrence of each transmit pulse.

A gain control circuit functionally shown as a gain control switch 41couples the voltage on the capacitor 25 to the receiver circuits whenthe capacitor voltage is less than the reference voltage on thecomparator 33. When the comparator 33 switches so as to produce anoutput voltage, however, this output voltage is applied through the gaincontrol switch 41 to the receiver circuits. The output voltage from thegain control switch constitutes a gain control voltage. This gaincontrol voltage is used for controlling the gain of preamplifiers aswill be described. Briefly, the gain control voltage serves to increasethe gain of the preamplifiers as the voltage becomes more negative.Thus, the gain control voltage increases the gain of these preamplifierslinearly from the termination of a transmit pulse until the occurrenceof a gating pulse. The gain control voltage then switches thepreamplifiers to a maximum gain condition until the beginning of thefollowing transmit pulse.

The PRF oscillator also contains means for producing a bottom thresholdvoltage. A switch 43 charges a capacitor 45 to a suitable negativevoltage such as -6 volts in response to an output voltage from themultivibrator 29. After the termination of the pulse from themultivibrator 29, the switch 43 opens and the capacitor 45 dischargesexponentially through a resistor 47. The capacitor 45 and the resistor47 are selected to provide an exponential decay that matches theincrease in attenuation of the sonic return with range.

Referring now to FIG. 4, a transmit pulse from the PRF oscillator 21triggers a pulsed oscillator 49 and its companion pulsed transmitter 51.The ouput of the pulsed transmitter 51 is applied through first andsec-.

0nd transmit-receive switches 53 and 55 to fore an aft transducers 57and 59 respectively.

The transmit-receive switches are straightforward devices, analogous totransmit-receive switches used in radar circuits. 7

Energy backscattered from scatterers in the water, or from the oceanbottom if the vessel is in shallow water, is received by the fore andaft transducers acting as hydrophones. After passing through the TRswitches, the returns encounter identical fore and aft receivers. Thefore and aft receivers include preamplifiers 61 and 63, respectively.The gain of the preamplifiers is governed by the gain control voltagefrom the PRF oscillator 21. The output signal from the preamplifier 61is applied to a first sub-channel containing a conventional tunedamplifier-limiter 65 and a zero-crossing-detecting comparator 67. Thecomparator'67 switches each time the signal from the limiter 65 passesthrough zero.

The output of the preamplifier 61 is also applied to a secondsub-channel including a detector 69, a video amplifier 71 and acomparator 73. The bottom threshold voltage wave from the PRF oscillator21 is used as a reference voltage for the comparator 73. The outputvoltage from the comparator 73 constitutes a bottom return pulse for usein the fore-channel of the speed log. If the vessel is travelling inshallow water, the bottom return pulse opens the processing channels toinitiate a measuring epoch. If the vessel is travelling in deeper water,a gating pulse is used to initiate a measuring epoch.

When the vessel is travelling in shallow water, sonic returns ofrelatively strong intensity will be reflected from the ocean bottom. Thecorresponding received voltage experiences a spreading loss which varieslinearly with depth. The circuit of FIG. 4 overcomes the effect of suchlinear loss by means ofa linearly increasing gain produced by the gaincontrol voltage applied to the preamplifier 61.

The return signals from the bottom also experience an attenuation lossthat varies exponentially with depth. The circuit of FIG. 4 compensatesfor this attenuation loss by means of the exponentially decreasingbottom threshold voltage. This voltage decreases the reference voltageapplied to the comparator 73.

Since the time required for a return pulse to reach the hydrophonesincreases with the distance to the ocean bottom, and since the gaincontrol voltage and the bottom threshold voltage are also functions oftime, these voltages serve to normalize the bottom detection thresholdof the speed log.

Because of the high frequency of the sonic signal preferred for use withthe speed log, water depths greater than about feet provide only weakbottom return signals having insufficient amplitude to exceed the bottomthreshold reference voltage. The sensitivity of the bottom thresholdvoltage can be set by adjusting the gain of the video amplifier 71 sothat substantially all returns from a shallow sea bottom will produce abottom trigger.

Under normal conditions, when the vessel is travelling in water having adepth greater than about 10 feet, any bottom return is too small to openthe processing channels. The processing channels then remain closeduntil the occurrence of a gating pulse which permits the returns fromscatterers in the sea water to be processed. Since the gating pulseserves to switch the preamplifiers to maximum gain, the returns from theseatterers are adequate to actuate the circuits in the processingchannel.

The output of the preamplifier 63 in the second channel of the speed logis applied to first and second subchannels for producing aft return andaft bottom returns, respectively. The construction of these subchannelsis identical to the construction of the subchannels supplied from thepreamplifier 61 as previously described.

The elements of the speed log pictured in FIG. 5 accept fore and aftsignals, bottom return signals, gating pulses, and transmit pulses. Thissection of the circuit performs counting and gating operations necessaryto produce the digital speed and distance displays.

The circuits depicted in FIG. 5 include enabling logic sections 74 and75 in the fore and aft channels respectively. The fore return is appliedto an AND gate 76. The output of the AND gate is applied through anoverflow counter 77 which typically counts 2,048 pulses and thenoverflows to provide a logic ONE signal which is inverted in aconventional inverter 79. The output of the inverter 79 is applied to apair of AND gates 81 and 83. The output terminals from the gates 81 and'83 are applied to an OR gate 85 and then to the .1 input terminal of aJ-K flip-flop 87. The fore return applied to the gate 76 is also appliedto the clock input terminal C of the flip-flop 87.

The voltage at the 0 output terminal of the flip-flop 87 constitutesatime gate and provides direct enabling pulses which are applied to asecond input terminal on the AND gate 76 and to an AND gate 89. Thecomplementary output terminal O of the flip-flop 87 providescomplementary enabling pulses which are applied to an AND gate 91 in theaft channel of the circuit.

The fore bottom return pulses from the receiver are applied to the ANDgate 81.

The gating pulses from the PRF oscillator 21 are also applied to the ANDgate 83. I

The output of the AND gate 81 is also applied through an OR gate 93 to aflip-flop 95. The flip-flop 95 is connected to energize an indicatorlamp 97 in response to a pulse from the OR gate 93.

The second enabling logic section 75 responds to return signals from theaft channel of the receiver and is constructed identically with thefirst enabling logic section in the fore channel.

The operation of the enabling logic sections may be understood by firstconsidering the operation of the enabling section in the fore channelwhen the vessel is in shallow water. Under these conditions, a bottomreturn signal will be sufficiently strong to overcome the bottomthreshold applied to the comparator 73 of FIG. 4 so as to produce abottom return pulse.

A transmit pulse from the PRF oscillator 21 resets the counter 77 andthe corresponding counter in the aft channel. This produces a low level(binary ZERO) signal at the output of the counter 77 and a correspondinghigh level signal at the output of the inverter 79 so as to enable thegates 81 and 83. When the assumed bottom return pulse occurs, it is ableto pass through the gate 81 and the OR gate 85 to the J input terminalof the flip-flop 87.

It will. be appreciated that when the vessel is in shallow water so thata bottom return pulse is produced, an oscillatory water return signalalso passes through the first sub-channel.

The first negative-going transition of the fore return applied to thegate 76, after the flip-flop 87 has received a signal at its J inputterminal, serves to switch the flip-flop so that a direct enabling pulseis produced at its Q output terminal when the voltage on the terminalgoes to logic ONE. This, in turn, permits the fore return signal to passto the counter 77 through the gate 76. After counting 2,048 periods ofthe fore water return, the counter 77 overflows so as to produce a highlevel signal at the output of the counter and at the K input terminal ofthe flip-flop 87. The next negativegoing transition of the fore returnthen switches the flip-flop 87 so as to provide a low output voltage(logic ZERO) at the terminal O. This removes the direct enabling voltagefrom AND gates 89 and 76.

It will be noticed that since the 6 output terminal of the flip-flop 87is connected to an input terminal of the AND gate 91 in the aft channel,the flip-flop applies enabling pulses to the gates 89 and 91 alternatelyas the flip-flop is switched from either state to the other.

From the above explanation it can be seen that a bottom return pulse inthe fore channel serves to initiate an enabling pulse which is appliedto the AND gate 89 for a period of time equal to the time required forthe reception ofa specified number (e.g., 2,048) of oscillations of thefore return signal.

The second enabling logic section 75 in the aft return channel operatesin a similar fashion so as to apply direct enabling signals to the ANDgate 91 for a period of time (epoch) equal to the time required for thereception of 2,048 oscillations in the aft return signal.

The above explanation assumed that the vessel was travelling in shallowwater so that a significant bottom return pulse was received in eachchannel. 1f the vessel is travelling in deeper water so that asignificant bottom return pulse is not received, the enabling logiccircuits will then respond to a gating pulse from the PRF oscillator 21of FIG. 4.

Reception ofa gating pulse enables the gate 83 in the fore channel andthe corresponding gate in the aft channel of the enabling logiccircuits. Since the gating pulse occurs after a transmit pulse, thecounter 77 in the fore channel and the corresponding counter in the aftchannel will have been reset prior to the reception of the gating pulse.Under these conditions, the inverter 79 will be providing a high leveloutput signal so as to permit passage of the gating pulse through thegate 83 and the OR gate 85 so as to provide a high level signal at the Jinput terminal of the flip-flop 87. The following negative-goingtransition of the fore return can then switch the flip-flop 87 so as toproduce a high level output signal at the Q output terminal of the flipflop 87 and thereby permit fore return transitions to actuate thecounter 77.

Thus it can be seen that whether or not a bottom return signal isreceived, a direct enabling pulse will be applied to the AND gate 89 fora period of time (epoch) required for the reception of the predeterminednumber of oscillations of the fore return signal.

Since each of the gates 89 and 91 receive complementary enabling signalsfrom the 6 output terminal of the flip-flop in the opposite channel, itcan be seen that either of the gates 89 and 91 will be opened only whenthe flip-flop in the corresponding channel is producing a high leveloutput at its Q output terminal and the flip flop in the oppositechannel is producing a high level output signal at its 6 outputterminal. Thus the gates 89 and 91 can pass signals only when thecounter in the corresponding channel is counting and when the counter inthe opposite channel is in its reset condition. In brief, the gates 89and 91 are opened only during time intervals equal to the difference intimes required for the reception of 2,048 fore and aft signals. Thisperiod difi'erence measurement is, however, equivalent to themeasurement of difference in frequency of the acoustic signals receivedby the fore and aft channels.

The AND gates 89 and 91 also receive oscillatory signals from clocksource 101. In a typical circuit, the clock source produces oscillationsat a nominal frequency of 6 MHz. In order to compensate fortemperature-caused variations in the velocity of sound in water, theclock frequency may be adjusted for temperature. Such adjustment can beconveniently performed by sensing the water temperature with atemperature sensor 103 and actuating a varactor 105 through a suitabledrive circuit 107. 4

The output signals from the clock source 101 pass through the gates 89and 91 during the time that these gates are enabled. The resultantsignals from the gates 89 and 91 represent time difference signals whichmay be applied through a suitable dividing circuit such as the circuit109 to actuate an up-down counter 111.

The use of a high clock frequency such as the 6 MHz frequency suggestedearlier is not mandatory. However, it has been found that the use of ahigh frequency and the subsequent division in the divider 109 minimizesquantization error associated with the gating process.

The counter 111 will accumulate pulses in the up sense so as to indicateforward motion of the vessel in response to time difference signals fromthe gate 91 in the aft channel, and pulses in the down sense in responseto time difference signals from the gate 89. When the vessel isproceeding in the forward direction, the frequency of the dopplershifted signals at the fore channel will be higher than thecorresponding signals at the aft channel so that the duration of thedirect enabling pulse in the fore channel will be shorter than theduration of the corresponding direct enabling pulse in the aft channel.Since the gates 89 and 91 are open only during the difference in timesof occurrence of the two direct enabling pulses, the gate 91 will passclock sig nals during the time that the .l-K flip-flop in the aftchannel provides a direct enabling signal and the J-K flip-flop 87 inthe fore channel has reverted to the state in which it is producing acomplementary enabling signal at its 6 output terminal.

The up-down counter 1 11 contains a straightforward logic circuit whichactuates up or down output terminals in response to up or down timedifference signals from the gates 91 or 89 respectively. The counteractuates a suitable readout circuit 112.

Although not strictly part of the invention, a typical readout circuitincludes an electronic switch 1 13 which receives the output signalsfrom the counter 111 through a decimal divider 115 and through a pair oflines 117 shunting the divider.

The electronic switch 113 normally passes signals directly from thecounter through the lines 117 to a working register 119. When the countin the register 119 reaches the equivalent of l knot, an overflow signalis fed to the electronic switch through a line 120 which actuates theswitch 113 so that subsequent signals pass through the decimal divider15. The same overflow signal shifts the decimal in the working register119. By this means, speeds below 1 knot may be read with a highresolution whereas speeds of l knot or greater are read with a lowerresolution.

The output of the counter 111 is also applied to a scale factor divider12]. For the clock frequency and particular dividers heretoforedescribed, it has been found that a factor of 12,800 in divider 121produces 1 pulse for each 0.1 nautical mile of travel. The output of thedivider 121 is applied through a conventional decoder and driver 123' toa display unit 125. The distance display continues to accumulate untilreset manually and thus effectively integrates the velocity information.

A reset divider 127 provides an overflow signal after the occurrence ofa specified number of transmit pulses. The overflow from the divider 127transfers the count from the working register 119 to the knots register129. The knots register thus receives the accumulated count acquiredduring a large number of measuring epochs. This effectively averages theresults of numerous measurements so as to increase accuracy andstability of the speed readout. In the particular embodiment, thedivider 127 was chosen to provide a ratio of 384. This provides ameasurement of 384 epochs and requires 2.8 seconds for a complete knotsmeasurement.

The count in the knots register is applied to a knots display unitthrough a conventional decoder-driver 133.

The overflow pulse from the reset divider is also applied to theflip-flop 95. If the count being accumulated was triggered by a bottomreturn pulse, the bottom indicator lamp 97 is illuminated. The overflowpulse resets the flip-flop and extinguishes the lamp at the terminationof the measuring interval.

While the invention has been described in its preferred embodiments, itis to be understood that the words which have been used are words ofdescription rather than limitation and that changes within the purviewof the appended claims may be made without departing from the true scopeand spirit of the invention in its broader aspects.

We claim:

1. A doppler speed log for a marine vessel comprising fore and aftdownwardly-looking transducers, means to form periodic transmittingpulses, means for electrically exciting said transducers in response tosaid transmitting pulses so as to launch bursts of oscillatory sonicenergy, said transducers being further constructed and arranged toproduce electrical signals in response to reflected portions of saidbursts of sonic energy, individual fore and aft channels for processingthe respective fore and aft electrical signals, each of said processingchannels including means for initiating a time gate, and means forterminating the time gate after the reception of a prescribed largenumber of oscillatory excursions of the received signal whereby theduration of said time gate is representative of the average period ofthe received oscillatory energy, said speed log further including meansfor determining the difference in duration of the respective time gates,and speed indicating means for displaying an indication of speedcorresponding to said difference in the durations of said time gates.

2. The speed log of claim 1 wherein the means to initiate the time gateincludes means to initiate such time gate at a prescribed time after thetermination of a transmitting pulse, said prescribed time being equal tothe time required for reflected energy to be returned to the transducerfrom a specified distance from the hull of the vessel.

3. The speed log of claim 1 further including means for accumulating theresults of successive difference determinations, and distance indicatingmeans responsive to said accumulation for displaying the distancetravelled by said vessel.

4. The speed log ofclaim 3 wherein the means for initiating a time gateincludes time responsive means for openingthe channel to the receptionof said electrical signals and means to maintain the channel in an opencondition until the termination of a time gate, and wherein the means todetermine the difference in duration of the respective time gatesincludes means in each channel to produce a direct enabling pulse duringthe time that the channel is in an open condition and means to produce atime difference signal during the occurrence of an enabling pulse inonly one of said channels, said indicating means being responsive tosaid time difference signals.

5. The speed log of claim 4 wherein the means to maintain a channel inthe open condition includes a flip-flop connected to produce a directenabling signal while the channel is open and a complementary enablingsignal while the channel is not open, and wherein said means forproducing time difference signals includes an AND gate in each channelconnected to receive a direct enablingsignal from the flip-flop in thecorresponding channel and a complementary enabling signal from theflip-flop in the opposite channel, said means for providing readoutindications further including a source of clock pulses, each of said ANDgates being connected to pass said clock pulses in response tosimultaneous direct and complementary enabling pulses from theflip-flops in said corresponding and opposite channels respectively.

6. The speed log of claim 5 wherein the means to provide readoutindications further includes an up-down counter connected to count in afirst direction in response to time difference signals from one of saidAND gates and in the opposite direction in response to time differencesignals from the other of said AND gates,

-said readout indication means including speed indication means toaccumulate the change in counter readings resulting from a predeterminednumber of transmission pulses.

7. The speed log of claim 6 wherein the clock source produces pulses ata repetition rate that is high with respect to the repetition rate ofsaid transmit pulses, said speed log being further characterized in thatsaid counter is coupled to each of said AND gates through an individualpulse rate divider.

8. The speed log of claim 7 wherein the repetition rate of the clocksource is responsive to an external voltage, said speed log furtherincluding a water temperature sensing element and drive means to providean external voltage to said clock source.

9. The speed log of claim 4 wherein the time responsive means includesmeans to produce a gating pulse after the lapse of a specified timeinterval following the termination of a transmit pulse, and gating meansin each channel responsive to said gating pulses for passing electricalsignals applied to that channel after the occurrence of a gating pulse,and wherein said means ill to maintain the channel in an open conditionincludes overflow counter means responsive to electrical signals passedby said gating means, said counter means being connected to close saidgating means after the counter has accepted a predetermined number ofcycles of said electrical signal.

10. The speed log of claim 9 wherein each of said fore and aft channelsincludes a first sub-channel for forming fore and aft return signalsrespectively and a second sub-channel for forming fore and aft bottomreturn pulses respectively and wherein said time responsive meansfurther includes a variable gain preamplifier in each channel forcoupling electrical signals from a transducer to the correspondingsub-channels, variable threshold comparator means in each of said secondsub-channels for forming bottom return pulses whenever a signal coupledfrom the corresponding preamplifier exceeds the instantaneous thresholdestablished from the comparator, said time responsive means furtherincluding means to increase the gain of both preamplifiers linearlyduring the time interval between the termination ofa transmit pulse andthe following gating pulse, said time responsive means still furtherincluding means to decrease the threshold of said comparatorexponentially during the same time interval and means to open saidgating means in the corresponding channel in response to a bottom returnpulse.

11. The speed log of claim it) wherein the time responsive means furtherincludes means to set the gain of both preamplifiers at the maximumlevel throughout a second time interval extending between the occurrenceof a gating pulse and the initiation of the next transmit pulse.

12. The speed log of claim 11 wherein the means to form periodictransmitting pulses is a pulse repetition frequency oscillator, saidoscillator containing a main capacitor and a constant current sourceconnected thereacross so that said capacitor can be charged linearlywith respect to time, a transmit pulse comparator connected to saidcapacitor and biased to a reference voltage whereby said comparatorproduces an output voltage whenever the capacitor voltage exceeds saidreference voltage, a monostable multivibrator coupled to said comparatorso that said multivibrator is triggered into its quasi-stable state inresponse to an output voltage from said comparator, said multivibratorbeing adjusted to have a quasi-stable state duration equal to thedesired duration ofa transmit pulse and being constructed to provide atransmit pulse during the time that the multivibrator is in saidquasi-stable state, and switching means for shorting said capacitorthroughout the occurrence of a transmit pulse.

13. The speed log of claim 12 wherein said means to produce gatingpulses includes a gating pulse comparator in said oscillator, saidgating pulse comparator being biased to a reference voltage of lowermagnitude than said transmit pulse comparator, said gating pulsecomparator being responsive to the voltage across said capacitor,whereby said gating pulse comparator produces an output signal at apredetermined time intermediate two successive transmit pulses, saidmeans to produce a gating pulse further including a differentiatingcircuit to convert the output voltage of said gating pulse comparatorinto short duration pulses.

14. The speed log of claim 13 wherein themeans for exponentiallydecreasing the threshold of the threshold comparator includes a parallelR-C network in said os cillator and switching means for connecting saidR-C network across a source of voltage during the occurrence of atransmit pulse.

l5. The speed log ofclaim 14 wherein the gain of said variable gainpreamplifiers is responsive to a gain control voltage applied thereto,said oscillator including means to couple a voltage from said maincapacitor to said preamplifiers until the occurrence of a gating pulse,said oscillator further including means to couple a voltage indicativeof the output of said gating pulse comparator to said preamplifiersafter the occurrence of a gating pulse.

16. A doppler speed log for a marine vessel comprising fore and aftdownwardly-looking transducers, means to form periodic transmittingpulses, means for electrically exciting said transducers in response tosaid transmitting pulses so as to launch bursts of oscillatory sonicenergy, said transducers being further constructed and arranged toproduce electrical signals in response to reflected portions of saidbursts of sonic energy, individual fore and aft channels for processingthe respective fore and aft electrical signals, each of said processingchannels including time responsive means for opening the channel to thereception of said electrical signals, means to maintain said channel inan open condition for the reception of a specified number ofoscillations of the electrical signal in that channel and means toproduce an enabling pulse during the time that the channel is in theopen condition, said speed log further including means for producingtime difference signals during the occurrence of an enabling pulse inonly one of said channels, and means to provide read out indications ofthe duration of said time difference signals.

1. A doppler speed log for a marine vessel comprising fore and aftdownwardly-looking transducers, means to form periodic transmittingpulses, means for electrically exciting said transducers in response tosaid transmitting pulses so as to launch bursts of oscillatory sonicenergy, said transducers being further constructed and arranged toproduce electrical signals in response to reflected portions of saidbursts of sonic energy, individual fore and aft channels for processingthe respEctive fore and aft electrical signals, each of said processingchannels including means for initiating a time gate, and means forterminating the time gate after the reception of a prescribed largenumber of oscillatory excursions of the received signal whereby theduration of said time gate is representative of the average period ofthe received oscillatory energy, said speed log further including meansfor determining the difference in duration of the respective time gates,and speed indicating means for displaying an indication of speedcorresponding to said difference in the durations of said time gates. 2.The speed log of claim 1 wherein the means to initiate the time gateincludes means to initiate such time gate at a prescribed time after thetermination of a transmitting pulse, said prescribed time being equal tothe time required for reflected energy to be returned to the transducerfrom a specified distance from the hull of the vessel.
 3. The speed logof claim 1 further including means for accumulating the results ofsuccessive difference determinations, and distance indicating meansresponsive to said accumulation for displaying the distance travelled bysaid vessel.
 4. The speed log of claim 3 wherein the means forinitiating a time gate includes time responsive means for opening thechannel to the reception of said electrical signals and means tomaintain the channel in an open condition until the termination of atime gate, and wherein the means to determine the difference in durationof the respective time gates includes means in each channel to produce adirect enabling pulse during the time that the channel is in an opencondition and means to produce a time difference signal during theoccurrence of an enabling pulse in only one of said channels, saidindicating means being responsive to said time difference signals. 5.The speed log of claim 4 wherein the means to maintain a channel in theopen condition includes a flip-flop connected to produce a directenabling signal while the channel is open and a complementary enablingsignal while the channel is not open, and wherein said means forproducing time difference signals includes an AND gate in each channelconnected to receive a direct enabling signal from the flip-flop in thecorresponding channel and a complementary enabling signal from theflip-flop in the opposite channel, said means for providing readoutindications further including a source of clock pulses, each of said ANDgates being connected to pass said clock pulses in response tosimultaneous direct and complementary enabling pulses from theflip-flops in said corresponding and opposite channels respectively. 6.The speed log of claim 5 wherein the means to provide readoutindications further includes an up-down counter connected to count in afirst direction in response to time difference signals from one of saidAND gates and in the opposite direction in response to time differencesignals from the other of said AND gates, said readout indication meansincluding speed indication means to accumulate the change in counterreadings resulting from a predetermined number of transmission pulses.7. The speed log of claim 6 wherein the clock source produces pulses ata repetition rate that is high with respect to the repetition rate ofsaid transmit pulses, said speed log being further characterized in thatsaid counter is coupled to each of said AND gates through an individualpulse rate divider.
 8. The speed log of claim 7 wherein the repetitionrate of the clock source is responsive to an external voltage, saidspeed log further including a water temperature sensing element anddrive means to provide an external voltage to said clock source.
 9. Thespeed log of claim 4 wherein the time responsive means includes means toproduce a gating pulse after the lapse of a specified time intervalfollowing the termination of a transmit pulse, and gating means in eachchannel responsive to said gating pulses for passinG electrical signalsapplied to that channel after the occurrence of a gating pulse, andwherein said means to maintain the channel in an open condition includesoverflow counter means responsive to electrical signals passed by saidgating means, said counter means being connected to close said gatingmeans after the counter has accepted a predetermined number of cycles ofsaid electrical signal.
 10. The speed log of claim 9 wherein each ofsaid fore and aft channels includes a first sub-channel for forming foreand aft return signals respectively and a second sub-channel for formingfore and aft bottom return pulses respectively and wherein said timeresponsive means further includes a variable gain preamplifier in eachchannel for coupling electrical signals from a transducer to thecorresponding sub-channels, variable threshold comparator means in eachof said second sub-channels for forming bottom return pulses whenever asignal coupled from the corresponding preamplifier exceeds theinstantaneous threshold established from the comparator, said timeresponsive means further including means to increase the gain of bothpreamplifiers linearly during the time interval between the terminationof a transmit pulse and the following gating pulse, said time responsivemeans still further including means to decrease the threshold of saidcomparator exponentially during the same time interval and means to opensaid gating means in the corresponding channel in response to a bottomreturn pulse.
 11. The speed log of claim 10 wherein the time responsivemeans further includes means to set the gain of both preamplifiers atthe maximum level throughout a second time interval extending betweenthe occurrence of a gating pulse and the initiation of the next transmitpulse.
 12. The speed log of claim 11 wherein the means to form periodictransmitting pulses is a pulse repetition frequency oscillator, saidoscillator containing a main capacitor and a constant current sourceconnected thereacross so that said capacitor can be charged linearlywith respect to time, a transmit pulse comparator connected to saidcapacitor and biased to a reference voltage whereby said comparatorproduces an output voltage whenever the capacitor voltage exceeds saidreference voltage, a monostable multivibrator coupled to said comparatorso that said multivibrator is triggered into its quasi-stable state inresponse to an output voltage from said comparator, said multivibratorbeing adjusted to have a quasi-stable state duration equal to thedesired duration of a transmit pulse and being constructed to provide atransmit pulse during the time that the multivibrator is in saidquasi-stable state, and switching means for shorting said capacitorthroughout the occurrence of a transmit pulse.
 13. The speed log ofclaim 12 wherein said means to produce gating pulses includes a gatingpulse comparator in said oscillator, said gating pulse comparator beingbiased to a reference voltage of lower magnitude than said transmitpulse comparator, said gating pulse comparator being responsive to thevoltage across said capacitor, whereby said gating pulse comparatorproduces an output signal at a predetermined time intermediate twosuccessive transmit pulses, said means to produce a gating pulse furtherincluding a differentiating circuit to convert the output voltage ofsaid gating pulse comparator into short duration pulses.
 14. The speedlog of claim 13 wherein the means for exponentially decreasing thethreshold of the threshold comparator includes a parallel R-C network insaid oscillator and switching means for connecting said R-C networkacross a source of voltage during the occurrence of a transmit pulse.15. The speed log of claim 14 wherein the gain of said variable gainpreamplifiers is responsive to a gain control voltage applied thereto,said oscillator including means to couple a voltage from said maincapacitor to said preamplifiers until the occurrence of a gating pulse,said oscillator Further including means to couple a voltage indicativeof the output of said gating pulse comparator to said preamplifiersafter the occurrence of a gating pulse.
 16. A doppler speed log for amarine vessel comprising fore and aft downwardly-looking transducers,means to form periodic transmitting pulses, means for electricallyexciting said transducers in response to said transmitting pulses so asto launch bursts of oscillatory sonic energy, said transducers beingfurther constructed and arranged to produce electrical signals inresponse to reflected portions of said bursts of sonic energy,individual fore and aft channels for processing the respective fore andaft electrical signals, each of said processing channels including timeresponsive means for opening the channel to the reception of saidelectrical signals, means to maintain said channel in an open conditionfor the reception of a specified number of oscillations of theelectrical signal in that channel and means to produce an enabling pulseduring the time that the channel is in the open condition, said speedlog further including means for producing time difference signals duringthe occurrence of an enabling pulse in only one of said channels, andmeans to provide readout indications of the duration of said timedifference signals.